Technical Field
The present invention relates to forming semiconductor devices with small device pitch and, more particularly, to forming a liner between contacts.
Description of the Related Art
As the size of transistors and other semiconductor devices decreases, these devices may be packed with ever greater efficiency onto integrated chips. In addition, improved fabrication technologies allow these devices to be formed closer together than ever before.
However, as the pitch between semiconductor devices decreases and the individual components of the devices come closer together, the risk of fabrication errors increases. In addition, the fabrication of some components may be coarse relative to others. In one example, forming contacts to the gates and source and drain regions of transistors can be difficult on tight semiconductor pitches, as a larger top critical dimension is used. This may result in contacts that are large enough to contact neighboring devices, creating short circuits that may lead to device failure.
The ground rules of the integrated chip design therefore need the contacts to be separated to prevent tip-to-tip or tip-to-side shorts, limiting the reduction in the area consumed by the device that would otherwise be possible with improved fabrication technologies.